MSL AD588KQ - MSL FPGA INC 專門從事 MSL MEISHILONG 可編程邏輯器件 FPGA 的設計與製造


Product Number	MSL AD588KQ
Category	電壓基準
Package	16-CERDIP
Packing Method	管件
Description	IC VREF SERIES 0.01% 16CDIP
Parameters	參考類型:系列\|輸出類型:可編程\|電壓 - 輸出（最小值/固定）:±5V，±10V\|電壓 - 輸出（最大值）:-\|電流 - 輸出:10 mA\|容差:±0.01%\|溫度係數:1.5ppm/°C\|雜訊 - 0.1Hz 至 10Hz:6µVp-p\|雜訊 - 10Hz 至 10Hz:-\|電壓 - 輸入:10.8V ~ 36V\|電流 - 供電:10mA\|電流 - 陰極:-\|工作溫度:0°C ~ 70°C（TA）

Product Number

MSL AD588KQ

Category

電壓基準

Package

16-CERDIP

Packing Method

管件

Description

IC VREF SERIES 0.01% 16CDIP

Parameters

Contact Us:

MSL FPGA INC (USA)
Registered Address: 1312 17th Street Unit #2199, Denver, CO 80202
Email: mslus@mslsemi.com

MSL FPGA PTE. LTD. (Singapore)
Registered Address: 91 Bencoolen Street #12-03, Sunshine Plaza, Singapore 189652
Email: mslsingapore@mslsemi.com

Meishilong Technology Co., Ltd. (Hong Kong)
Registered Address: Rm A1-13, Blk A 3/F, Yee Lim Industrial Centre, 2-28 Kwai Lok Street, Kwai Chung NT, Hong Kong
Email: mslhk@mslsemi.com

Meishilong Technology (Shenzhen) Co., Ltd.
2603M, Dingcheng International Building, No.7 Zhonghang Road, Huahang Community, Huaqiangbei Street, Futian District, Shenzhen
Email: mslchina@mslsemi.com

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