MSL 5962-9051801MEA - MSL FPGA INC 專門從事 MSL MEISHILONG 可編程邏輯器件 FPGA 的設計與製造


Product Number	MSL 5962-9051801MEA
Category	時鐘發生器，PLL，頻率合成器
Package	16-CERDIP
Packing Method	散裝
Description	IC BIT RATE GEN 16CERDIP
Parameters	類型:比特率發生器\|PLL:無\|輸入:時鐘，晶體\|輸出:時鐘，晶體\|電路數:1\|比率 - 輸入:2：1\|差分 - 輸入:無/無\|頻率 - 最大值:1MHz\|分頻器/倍頻器:是/無\|電壓 - 供電:4.5V ~ 5.5V\|工作溫度:-55°C ~ 125°C（TA）

Product Number

MSL 5962-9051801MEA

Category

時鐘發生器，PLL，頻率合成器

Package

16-CERDIP

Packing Method

散裝

Description

IC BIT RATE GEN 16CERDIP

Parameters

Contact Us:

MSL FPGA INC (USA)
Registered Address: 1312 17th Street Unit #2199, Denver, CO 80202
Email: mslus@mslsemi.com

MSL FPGA PTE. LTD. (Singapore)
Registered Address: 91 Bencoolen Street #12-03, Sunshine Plaza, Singapore 189652
Email: mslsingapore@mslsemi.com

Meishilong Technology Co., Ltd. (Hong Kong)
Registered Address: Rm A1-13, Blk A 3/F, Yee Lim Industrial Centre, 2-28 Kwai Lok Street, Kwai Chung NT, Hong Kong
Email: mslhk@mslsemi.com

Meishilong Technology (Shenzhen) Co., Ltd.
2603M, Dingcheng International Building, No.7 Zhonghang Road, Huahang Community, Huaqiangbei Street, Futian District, Shenzhen
Email: mslchina@mslsemi.com

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