MSL CY2SSTV850ZC - MSL FPGA INC 專門從事 MSL MEISHILONG 可編程邏輯器件 FPGA 的設計與製造


Product Number	MSL CY2SSTV850ZC
Category	時鐘發生器，PLL，頻率合成器
Package	48-TSSOP
Packing Method	散裝
Description	PLL BASED CLOCK DRIVER, SSTV SER
Parameters	類型:-\|PLL:帶旁路\|輸入:時鐘\|輸出:SSTL-2\|電路數:1\|比率 - 輸入:1：10\|差分 - 輸入:是/是\|頻率 - 最大值:170MHz\|分頻器/倍頻器:無/無\|電壓 - 供電:2.375V ~ 3.465V\|工作溫度:0°C ~ 70°C

Product Number

MSL CY2SSTV850ZC

Category

時鐘發生器，PLL，頻率合成器

Package

48-TSSOP

Packing Method

散裝

Description

PLL BASED CLOCK DRIVER, SSTV SER

Parameters

Contact Us:

MSL FPGA INC (USA)
Registered Address: 1312 17th Street Unit #2199, Denver, CO 80202
Email: mslus@mslsemi.com

MSL FPGA PTE. LTD. (Singapore)
Registered Address: 91 Bencoolen Street #12-03, Sunshine Plaza, Singapore 189652
Email: mslsingapore@mslsemi.com

Meishilong Technology Co., Ltd. (Hong Kong)
Registered Address: Rm A1-13, Blk A 3/F, Yee Lim Industrial Centre, 2-28 Kwai Lok Street, Kwai Chung NT, Hong Kong
Email: mslhk@mslsemi.com

Meishilong Technology (Shenzhen) Co., Ltd.
2603M, Dingcheng International Building, No.7 Zhonghang Road, Huahang Community, Huaqiangbei Street, Futian District, Shenzhen
Email: mslchina@mslsemi.com

Message

Online Message