MSL 74VHC4046N - MSL FPGA INC 專門從事 MSL MEISHILONG 可編程邏輯器件 FPGA 的設計與製造


Product Number	MSL 74VHC4046N
Category	時鐘發生器，PLL，頻率合成器
Package	16-PDIP
Packing Method	管件
Description	IC PHASE LOCK LOOP 16DIP
Parameters	類型:鎖相環路（PLL）\|PLL:無\|輸入:CMOS\|輸出:三態\|電路數:1\|比率 - 輸入:1：2\|差分 - 輸入:無/無\|頻率 - 最大值:14MHz\|分頻器/倍頻器:無/無\|電壓 - 供電:2V ~ 6V\|工作溫度:-40°C ~ 85°C

Product Number

MSL 74VHC4046N

Category

時鐘發生器，PLL，頻率合成器

Package

16-PDIP

Packing Method

管件

Description

IC PHASE LOCK LOOP 16DIP

Parameters

Contact Us:

MSL FPGA INC (USA)
Registered Address: 1312 17th Street Unit #2199, Denver, CO 80202
Email: mslus@mslsemi.com

MSL FPGA PTE. LTD. (Singapore)
Registered Address: 91 Bencoolen Street #12-03, Sunshine Plaza, Singapore 189652
Email: mslsingapore@mslsemi.com

Meishilong Technology Co., Ltd. (Hong Kong)
Registered Address: Rm A1-13, Blk A 3/F, Yee Lim Industrial Centre, 2-28 Kwai Lok Street, Kwai Chung NT, Hong Kong
Email: mslhk@mslsemi.com

Meishilong Technology (Shenzhen) Co., Ltd.
2603M, Dingcheng International Building, No.7 Zhonghang Road, Huahang Community, Huaqiangbei Street, Futian District, Shenzhen
Email: mslchina@mslsemi.com

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