MSL MAX3620BETT - MSL FPGA INC 專門從事 MSL MEISHILONG 可編程邏輯器件 FPGA 的設計與製造


Product Number	MSL MAX3620BETT
Category	延遲線
Package	6-TDFN（3x3）
Packing Method	散裝
Description	DELAY LINES - CLOCK DISTRIBUTION
Parameters	抽頭/步數:-\|功能:多重\|延遲到第 1 抽頭:-\|抽頭增量:-\|可用總延遲:1ns\|獨立延遲數:2\|電壓 - 供電:-1.5V ~ 1.5V\|工作溫度:-40°C ~ 85°C

Product Number

MSL MAX3620BETT

Category

延遲線

Package

6-TDFN（3x3）

Packing Method

散裝

Description

DELAY LINES - CLOCK DISTRIBUTION

Parameters

Contact Us:

MSL FPGA INC (USA)
Registered Address: 1312 17th Street Unit #2199, Denver, CO 80202
Email: mslus@mslsemi.com

MSL FPGA PTE. LTD. (Singapore)
Registered Address: 709 Ang Mo Kio Avenue 8 #01-2591, Singapore 560709
Email: mslsingapore@mslsemi.com

Meishilong Technology Co., Ltd. (Hong Kong)
Registered Address: Rm A1-13, Blk A 3/F, Yee Lim Industrial Centre, 2-28 Kwai Lok Street, Kwai Chung NT, Hong Kong
Email: mslhk@mslsemi.com

Meishilong Technology (Shenzhen) Co., Ltd.
2603M, Dingcheng International Building, No.7 Zhonghang Road, Huahang Community, Huaqiangbei Street, Futian District, Shenzhen
Email: mslchina@mslsemi.com

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