MSL CY2318ANZPVXC-11KJ - MSL FPGA INC 專門從事 MSL MEISHILONG 可編程邏輯器件 FPGA 的設計與製造


Product Number	MSL CY2318ANZPVXC-11KJ
Category	應用特定時鐘抖定時
Package	48-SSOP
Packing Method	散裝
Description	CY2318ANZ - 18 Output, 3.3V SDRA
Parameters	PLL:無\|主要用途:Intel CPU，記憶體，SRAM DIMM\|輸入:-\|輸出:-\|電路數:1\|比率 - 輸入:1：18\|差分 - 輸入:無/無\|頻率 - 最大值:100MHz\|電壓 - 供電:3.135V ~ 3.465V\|工作溫度:0°C ~ 70°C（TA）

Product Number

MSL CY2318ANZPVXC-11KJ

Category

應用特定時鐘抖定時

Package

48-SSOP

Packing Method

散裝

Description

CY2318ANZ - 18 Output, 3.3V SDRA

Parameters

Contact Us:

MSL FPGA INC (USA)
Registered Address: 1312 17th Street Unit #2199, Denver, CO 80202
Email: mslus@mslsemi.com

MSL FPGA PTE. LTD. (Singapore)
Registered Address: 709 Ang Mo Kio Avenue 8 #01-2591, Singapore 560709
Email: mslsingapore@mslsemi.com

Meishilong Technology Co., Ltd. (Hong Kong)
Registered Address: Rm A1-13, Blk A 3/F, Yee Lim Industrial Centre, 2-28 Kwai Lok Street, Kwai Chung NT, Hong Kong
Email: mslhk@mslsemi.com

Meishilong Technology (Shenzhen) Co., Ltd.
2603M, Dingcheng International Building, No.7 Zhonghang Road, Huahang Community, Huaqiangbei Street, Futian District, Shenzhen
Email: mslchina@mslsemi.com

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