MSL WM8904ECS/R - MSL FPGA INC 專門從事 MSL MEISHILONG 可編程邏輯器件 FPGA 的設計與製造


Product Number	MSL WM8904ECS/R
Category	編解碼器
Package	36-WCSP（2.65x2.53）
Packing Method	卷帶（TR）
Description	IC CODEC STEREO ULP 36WCSP
Parameters	類型:身歷聲音頻\|數據介面:-\|解析度（位）:-\|ADC/DAC 數:2 / 2\|三角積分:是\|信噪比，ADC/DAC (db)（典型值）:91 / 96\|動態範圍，ADC/DAC (db) 典型值:-\|電壓 - 供電，模擬:1.71V ~ 2V\|電壓 - 供電，數字:1.42V ~ 3.6V\|工作溫度:-40°C ~ 85°C

Product Number

MSL WM8904ECS/R

Category

編解碼器

Package

36-WCSP（2.65x2.53）

Packing Method

卷帶（TR）

Description

IC CODEC STEREO ULP 36WCSP

Parameters

Contact Us:

MSL FPGA INC (USA)
Registered Address: 1312 17th Street Unit #2199, Denver, CO 80202
Email: mslus@mslsemi.com

MSL FPGA PTE. LTD. (Singapore)
Registered Address: 709 Ang Mo Kio Avenue 8 #01-2591, Singapore 560709
Email: mslsingapore@mslsemi.com

Meishilong Technology Co., Ltd. (Hong Kong)
Registered Address: Rm A1-13, Blk A 3/F, Yee Lim Industrial Centre, 2-28 Kwai Lok Street, Kwai Chung NT, Hong Kong
Email: mslhk@mslsemi.com

Meishilong Technology (Shenzhen) Co., Ltd.
2603M, Dingcheng International Building, No.7 Zhonghang Road, Huahang Community, Huaqiangbei Street, Futian District, Shenzhen
Email: mslchina@mslsemi.com

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